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t7 will be clobbered

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jiankercn
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Joined: 2008-04-02
Points: 0

NOTE: I'am sory that I have replaced the MIPS with SUPERH4.
And now I let it back.^_^
And I replace the C syntax style comment with '#'

3435 extern void
3436 CVMCPUemitAtomicSwap(CVMJITCompilationContext* con,
3437 int destReg, int addressReg)
3438 {
3439 int retryLogicalPC;
3440
3441 CVMtraceJITCodegen(("\t\t"));
3442 CVMJITdumpCodegenComments(con);
3443
3444 # top of retry loop in case CAS operation is interrupted.
3445 CVMtraceJITCodegen(("\t\tretry:\n"));
3446 retryLogicalPC = CVMJITcbufGetLogicalPC(con);
3447
3448 # SC will clobber destReg, but we still need it in case SC
3449 # fails and we have to retry. Use t7 as the scratch register to
3450 # save contents of newValReg.
3451
3452 CVMJITaddCodegenComment((con, "copy new word since sc will trash it"));
3453 CVMCPUemitMoveRegister(con, CVMCPU_MOV_OPCODE,
3454 CVMMIPS_t7, destReg, CVMJIT_NOSETCC);
3455
3456
3457 # emit LL instruction
3458 emitInstruction(con, MIPS_LL_OPCODE | destReg << MIPS_R_RT_SHIFT |
3459 addressReg << MIPS_RS_SHIFT | 0);
3460 CVMJITaddCodegenComment((con, "fetch word from address"));
3461 CVMtraceJITCodegenExec({
3462 printPC(con);
3463 CVMconsolePrintf(" ll %s, (%s)",
3464 regName(destReg), regName(addressReg));
3465 });
3466 CVMJITdumpCodegenComments(con);
3467
3468 # emit SC instruction
3469 emitInstruction(con, MIPS_SC_OPCODE | CVMMIPS_t7 << MIPS_R_RT_SHIFT |
3470 addressReg << MIPS_RS_SHIFT | 0);
3471 CVMJITaddCodegenComment((con, "conditionally store new word in address"));
3472 CVMtraceJITCodegenExec({
3473 printPC(con);
3474 CVMconsolePrintf(" sc %s, (%s)",
3475 regName(CVMMIPS_t7), regName(addressReg));
3476 });
3477 CVMJITdumpCodegenComments(con);
3478
3479 # Retry if reservation was lost and atomic operation failed
3480 CVMJITaddCodegenComment((con, "br retry if reservation was lost"));
3481 CVMMIPSemitBranch0(con, retryLogicalPC,
3482 MIPS_BEQ_OPCODE, CVMMIPS_t7, CVMMIPS_zero,
3483 NULL, CVM_TRUE); # include nop
3484
3485 CVMJITprintCodegenComment(("End of Atomic Swap"));
3486 }
It will generate codes maybe like this:
retry:
move t7, destReg
ll destReg, (addressReg)
sc t7, (addressReg)
beq t7, zero, retry
The comment says destReg will be clobbered, so move destReg to t7.
But when ll and sc failed, t7 will be also clobbered.When retry again,t7 must be wrong(t7 is zero).
If I made a mistake in understanding the source code?
Or maybe the generated codes like this:
move t7, destReg
retry:
ll destReg, (addressReg)
sc t7, (addressReg)
beq t7, zero, retry
But also t7 will be clobbered!
Did I make a mistake in understanding the source code?
Or maybe it's a bug?

Message was edited by: jiankercn

Message was edited by: jiankercn

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cjplummer
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Joined: 2006-10-16
Points: 0

The code you've given is for your SH implementation, not for MIPS. Is there a problem with the MIPS version?

Chris

jiankercn
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Joined: 2008-04-02
Points: 0

I have described my promble with the source code, there are at the end of the source code.
But it's not displayed.I don't know why!
Maybe I post more words!

cjplummer
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Joined: 2006-10-16
Points: 0

The email notification I got had your complete posting. I think this forum software has a problem with it because it is confusing some of the C syntax with html. So I still have the same question. You posted your SH code. Is there also a concern with the MIPS code. If so, can you post the generated MIPS code and explain what you think is wrong.

thanks,

Chris